1. Field of the Invention
The present invention relates to semiconductor processing techniques and, in particular, concerns a method and a system that allows for more efficient plasma etching of semiconductor devices as a result of reducing accumulated charge on the semiconductor device during the plasma etching process.
2. Description of the Related Art
The manufacturing of semiconductor devices often requires the formation of openings within the substrate or in one or more overlying layers of the semiconductor device. Typically, these openings are formed such that devices can be formed in the openings. Additionally, openings are formed in layers so that interconnecting structures can be formed in the openings to allow for interconnection with devices either formed in underlying layers of the semiconductor device or in the substrate of the semiconductor device. These openings are typically formed using etching processes wherein a portion of the semiconductor device is exposed to an etchant that removes the exposed portion.
As device dimensions have become increasingly smaller, it is desirable that openings formed in semiconductor devices be formed to extremely small tolerances. To accomplish this, it is desirable to use etching techniques that are relatively anisotropic such that the sidewalls of openings are as vertical as possible. Moreover, there is an increasing desire to use dry etching processes, as opposed to wet etching processes, due to the anisotropic nature of ion-assisted dry etching.
Plasma etching is a type of dry etching that can be very anisotropic and is preferred in many semiconductor processes. Typically, when plasma etching, a chemical etchant gas is positioned within a chamber and an energy source is applied to the chamber so as to energize the chemical etchant gas into a plasma state. More particularly, the pressure inside of the chamber is reduced by a vacuum system and a power supply creates an electric or electromagnetic field in the chamber through electrodes positioned within the chamber. The charged electric or electromagnetic field energizes the chemical etchant gas into a plasma state. In a plasma state, the chemical etchant gas is transformed into a disassociated mixture of uncharged neutrals as well as electrons and ions. Preferably, the chemical etchant gas that is introduced into the chamber is selected such that, when it is transformed into a plasma state, has chemistry that is selective to particular materials on the semiconductor device. Moreover, the typical plasma etching system induces an electrical field such that ions are directed towards the exposed surface of the wafer. The gas conditions are preferably selected so that the ions react with the exposed material on the semiconductor device thereby removing the exposed material from the semiconductor device.
Plasma etching can be very anisotropic resulting in etched openings of very high tolerances. However, it has been observed that the flux of charged particles around the semiconductor device during plasma etching results in the surfaces of the semiconductor device accumulating charge. The density of the accumulated charge on the semiconductor device is dependent upon the plasma parameters, e.g., plasma uniformity, energy and angular distribution of ions and electrons, as well as being dependent upon the geometry of the semiconductor device. Unfortunately, an increase in surface charge and, in particular, an increase in surface charge at particular regions of the semiconductor device, can result in etch non-uniformity, etch stop, and etch profile distortions. The term “aspect-ratio-dependent charging” is used to describe these failures if they are caused by the surface charge effect.
In particular, as surface charge builds up on the surface of the semiconductor device, this charge generates an electric field which affects subsequently accelerated ions and electrons that are being directed toward the semiconductor device. A build-up of charge on the semiconductor device adjacent the area to be etched that is of the same polarity as the ions that are participating in etching the semiconductor device can hinder or even halt etching of the exposed surface. Similarly, a build-up of opposite polarity charge will attract ions thereby diverting ions which can result in non-uniformity of etching. As device dimensions become increasingly smaller, the problems associated with build-up of surface charge during plasma etching can significantly hinder the ability to form more uniformly shaped openings in the semiconductor device through plasma etching.
In fact, many different types of plasma processes are negatively affected by build up of charge in this manner. For example, plasma induced chemical vapor deposition can also result in accumulations of charge in the same manner as described above in connection with plasma etching. This build of charge can similarly affect deposition rates and result in localized areas of non-uniform deposition of semiconductor material. Hence, plasma processing of many different types are subject to difficulties stemming from charge build up.
From the foregoing, it will be appreciated that there is a continuing need for etching techniques that can be used to form extremely small openings, e.g., in the submicron, and sub-quarter micron, range, to a high degree of tolerance. To this end, there is a continuing need for plasma etching techniques wherein the etching is less affected by build-up of surface charge.